libgccjit: Add support for Aarch64 CPU features #108

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antoyo wants to merge 1 commit from antoyo/gcc:gccjit/aarch64-cpu-features into trunk
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gcc/ChangeLog:

	* config.gcc: Mention new aarch64-jit.o file.
	* config/aarch64/aarch64-jit.cc: Detect CPU features.
	* config/aarch64/aarch64-jit.h: New target hook.
	* config/aarch64/t-aarch64: Mention new aarch64-jit.cc file.
	* config/i386/i386-jit.cc: Remove target-dependent type
	detection.

gcc/jit/ChangeLog:

	* jit-target.cc: Move target-dependent type detection to common
	file.

gcc/testsuite/ChangeLog:

	* jit.dg/all-non-failing-tests.h: Mention new test.
	* jit.dg/test-target-info-aarch64.c: New test.

Co-authored-by: winstonallo <arthurbiedchar@gmail.com>

CC: David Malcolm dmalcolm@redhat.com, jit@gcc.gnu.org

``` gcc/ChangeLog: * config.gcc: Mention new aarch64-jit.o file. * config/aarch64/aarch64-jit.cc: Detect CPU features. * config/aarch64/aarch64-jit.h: New target hook. * config/aarch64/t-aarch64: Mention new aarch64-jit.cc file. * config/i386/i386-jit.cc: Remove target-dependent type detection. gcc/jit/ChangeLog: * jit-target.cc: Move target-dependent type detection to common file. gcc/testsuite/ChangeLog: * jit.dg/all-non-failing-tests.h: Mention new test. * jit.dg/test-target-info-aarch64.c: New test. Co-authored-by: winstonallo <arthurbiedchar@gmail.com> ``` CC: David Malcolm <dmalcolm@redhat.com>, jit@gcc.gnu.org
gcc/ChangeLog:

	* config.gcc: Mention new aarch64-jit.o file.
	* config/aarch64/aarch64-jit.cc: Detect CPU features.
	* config/aarch64/aarch64-jit.h: New target hook.
	* config/aarch64/t-aarch64: Mention new aarch64-jit.cc file.
	* config/i386/i386-jit.cc: Remove target-dependent type
	detection.

gcc/jit/ChangeLog:

	* jit-target.cc: Move target-dependent type detection to common
	file.

gcc/testsuite/ChangeLog:

	* jit.dg/all-non-failing-tests.h: Mention new test.
	* jit.dg/test-target-info-aarch64.c: New test.

Co-authored-by: winstonallo <arthurbiedchar@gmail.com>
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/submit

/submit
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Version 1 of this pull request has been stored. It includes the following commits:

  • libgccjit: Add support for Aarch64 CPU features - dcd2f8e20c
<!-- pr-new-version --> Version 1 of this pull request has been stored. It includes the following commits: - libgccjit: Add support for Aarch64 CPU features - dcd2f8e20cf4b1a7809f1932576a31a5635bb3a1
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Pull Request versions:

# Base Head
1 99af0f9078 dcd2f8e20c (diff)

In order to compare , clone this repository and run

PR=108
git fetch origin "refs/versioned_pull/${PR}/*:refs/versioned_pull/${PR}/*"
PRV1=1
PRV2=2
git range-diff "refs/versioned_pull/${PR}/${PRV1}/base..refs/versioned_pull/${PR}/${PRV1}/head"  "refs/versioned_pull/${PR}/${PRV2}/base..refs/versioned_pull/${PR}/${PRV2}/head"
<!-- pr-versions --> Pull Request versions: | # | Base | Head | | | - | ---- | ---- | - | | 1 | 99af0f9078865269ae13367a25e2b156c8ccba77 | dcd2f8e20cf4b1a7809f1932576a31a5635bb3a1 | [(diff)](https://forge.sourceware.org/gcc/gcc-TEST.git/compare/99af0f9078865269ae13367a25e2b156c8ccba77...dcd2f8e20cf4b1a7809f1932576a31a5635bb3a1) | In order to compare , clone this repository and run ``` PR=108 git fetch origin "refs/versioned_pull/${PR}/*:refs/versioned_pull/${PR}/*" PRV1=1 PRV2=2 git range-diff "refs/versioned_pull/${PR}/${PRV1}/base..refs/versioned_pull/${PR}/${PRV1}/head" "refs/versioned_pull/${PR}/${PRV2}/base..refs/versioned_pull/${PR}/${PRV2}/head" ```
Member

Sent patch series version 1 containing 1 patches to gcc-patches mailing list test-list@sourceware.org and cc'd David Malcolm dmalcolm@redhat.com, jit@gcc.gnu.org.
Cover letter

Sent patch series version 1 containing 1 patches to gcc-patches mailing list <test-list@sourceware.org> and cc'd David Malcolm <dmalcolm@redhat.com>, jit@gcc.gnu.org. [Cover letter](https://inbox.sourceware.org/test-list/176064408797.1134.16013077532774006604.batrachomyomachia.gcc.gcc-TEST.108.1.0@forge-test.rdfm.org)
@ -0,0 +54,4 @@
}
#endif
if (TARGET_AES)
Member

There has to be a better way of doing this. Especially since the information you need is already in aarch64-option-extensions.def. So only one place needs to be updated when new option extensions are added.

Maybe something like:

#define AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, EXPLICIT_OFF, FEATURE_STRING) \
if (TARGET_##IDENT) jit_add_target_info_space ("target_feature", FEATURE_STRING);
#include "aarch64-option-extensions.def"

Where jit_add_target_info_space does the space handling for some of the feature strings (like for TARGET_PAUTH).

There has to be a better way of doing this. Especially since the information you need is already in aarch64-option-extensions.def. So only one place needs to be updated when new option extensions are added. Maybe something like: ``` #define AARCH64_OPT_EXTENSION(NAME, IDENT, REQUIRES, EXPLICIT_ON, EXPLICIT_OFF, FEATURE_STRING) \ if (TARGET_##IDENT) jit_add_target_info_space ("target_feature", FEATURE_STRING); #include "aarch64-option-extensions.def" ``` Where jit_add_target_info_space does the space handling for some of the feature strings (like for TARGET_PAUTH).
Author
Member

With regards to the mapping between GCC and Rust names we talked on IRC, where would you put them?
A copy in gccrs and the other in libgccjit?

With regards to the mapping between GCC and Rust names we talked on IRC, where would you put them? A copy in gccrs and the other in libgccjit?
Member

With regards to the mapping between GCC and Rust names we talked on IRC, where would you put them?

It should go into gccrs. Since that is gccrs specific code rather than generic libgccjit code.

>With regards to the mapping between GCC and Rust names we talked on IRC, where would you put them? It should go into gccrs. Since that is gccrs specific code rather than generic libgccjit code.
Author
Member

Ok, so you mean the mapping won't be in libgccjit, but will be in rustc_codegen_gcc?
I'm asking because it was done differently for x86.

Ok, so you mean the mapping won't be in libgccjit, but will be in `rustc_codegen_gcc`? I'm asking because it was done differently for x86.
Member

Well, maybe x86_64 maintainers are ok with matching the names up that way. That does not mean other target maintainers should allow designs that don't scale that well in libgccjit.

Well, maybe x86_64 maintainers are ok with matching the names up that way. That does not mean other target maintainers should allow designs that don't scale that well in libgccjit.
Author
Member

I'm currently doing this change.
Is the file aarch64-option-extensions.def up-to-date?
I see the following:

AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "svef32mm")

but TARGET_F32MM doesn't seem to exist anymore.

I'm currently doing this change. Is the file `aarch64-option-extensions.def` up-to-date? I see the following: ``` AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "svef32mm") ``` but `TARGET_F32MM` doesn't seem to exist anymore.
Member

@antoyo wrote in #108 (comment):

I'm currently doing this change. Is the file aarch64-option-extensions.def up-to-date? I see the following:

AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "svef32mm")

but TARGET_F32MM doesn't seem to exist anymore.

Because I messed up. AARCH64_HAVE_ISA (IDENT) is what you want rather than TARGET_##IDENT.

@antoyo wrote in https://forge.sourceware.org/gcc/gcc-TEST/pulls/108#issuecomment-3308: > I'm currently doing this change. Is the file `aarch64-option-extensions.def` up-to-date? I see the following: > > ```text > AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "svef32mm") > ``` > > but `TARGET_F32MM` doesn't seem to exist anymore. Because I messed up. `AARCH64_HAVE_ISA (IDENT)` is what you want rather than `TARGET_##IDENT`.
antoyo marked this conversation as resolved
@ -0,0 +123,4 @@
jit_add_target_info ("target_feature", "tme");
// TODO: features dit, dpb, dpb2, flagm, lor, pan, pmuv3, ras, spe, ssbs, vh
if (AARCH64_HAVE_ISA (V8_1A))
Member

as this part:

#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
if (AARCH64_HAVE_ISA (ARCH_IDENT)) jit_add_target_info ("target_feature", NAME);
#include "aarch64-arches.def"

I Noticed you didn't include v9 here either which seems wrong. and v8.8/v8.9 are also missing :)
This is why duplicating things is the wrong approach.

as this part: ``` #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \ if (AARCH64_HAVE_ISA (ARCH_IDENT)) jit_add_target_info ("target_feature", NAME); #include "aarch64-arches.def" ``` I Noticed you didn't include v9 here either which seems wrong. and v8.8/v8.9 are also missing :) This is why duplicating things is the wrong approach.
antoyo marked this conversation as resolved
@ -0,0 +1,140 @@
/* Subroutines for the jit front end on the AArch64 architecture.
Copyright (C) 2024 Free Software Foundation, Inc.
Member

Oh the copyright year should be the current one too.

Oh the copyright year should be the current one too.
antoyo marked this conversation as resolved
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if (TARGET_BTI)
jit_add_target_info ("target_feature", "bti");
if (TARGET_SVE_F32MM) // TODO: not sure what to do with this.
Member

You don't need these #undef, the include already does:

#undef AARCH64_OPT_FMV_EXTENSION
#undef AARCH64_OPT_EXTENSION
#undef AARCH64_FMV_FEATURE
You don't need these #undef, the include already does: ``` #undef AARCH64_OPT_FMV_EXTENSION #undef AARCH64_OPT_EXTENSION #undef AARCH64_FMV_FEATURE ```
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FEATURE_STRING);
#include "aarch64-option-extensions.def"
if (TARGET_BTI)
Author
Member

@pinskia: TARGET_BTI is defined in aarch64.h, so I assume it is OK to define it manually here.
Unless I'm missing something?

@pinskia: `TARGET_BTI` is defined in `aarch64.h`, so I assume it is OK to define it manually here. Unless I'm missing something?
Member

Yes. BTI should be fine as it is only enabled if armv8.5-a is enabled.

Yes. BTI should be fine as it is only enabled if armv8.5-a is enabled.
pinskia marked this conversation as resolved
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CI state: success
CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/ : CI bot tcwg_gnu_cross_check_gcc--master-arm: Test results
See: https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/notify/mail-body.txt

Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In  master-arm, after:
  | gcc patch https://forge.sourceware.org/gcc/gcc-TEST/pulls/108
  | Author: Antoni Boucher <bouanto@zoho.com>
  | Date:   Thu Oct 16 15:24:26 2025 -0400
  | 
  |     [PATCH] libgccjit: Add support for Aarch64 CPU features
  |     
  |     gcc/ChangeLog:
  |     
  |             * config.gcc: Mention new aarch64-jit.o file.
  | ... 19 lines of the commit log omitted.
  | ... applied on top of baseline commit:
  | a46dffee33a3 match.pd: Fold VEC_PERM_EXPR chains implementing concat-and-extract


Used configuration :
 *CI config* tcwg_gnu_cross_check_gcc master-arm
 *configure and test flags:* --target arm-linux-gnueabihf 

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

-----------------8<--------------------------8<--------------------------8<--------------------------

The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in *.log.1.xz files in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/00-sumfiles/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/notify/
The list of [ignored] baseline and flaky failures are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/sumfiles/xfails.xfail

Current build   : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2409/artifact/artifacts

Warning: we do not enable maintainer-mode nor automatically update
generated files, which may lead to failures if the patch modifies the
master files.

<!-- linaro-ci-status CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/ --> CI state: success :white_check_mark: CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/ : CI bot tcwg_gnu_cross_check_gcc--master-arm: Test results See: https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/notify/mail-body.txt ``` Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In master-arm, after: | gcc patch https://forge.sourceware.org/gcc/gcc-TEST/pulls/108 | Author: Antoni Boucher <bouanto@zoho.com> | Date: Thu Oct 16 15:24:26 2025 -0400 | | [PATCH] libgccjit: Add support for Aarch64 CPU features | | gcc/ChangeLog: | | * config.gcc: Mention new aarch64-jit.o file. | ... 19 lines of the commit log omitted. | ... applied on top of baseline commit: | a46dffee33a3 match.pd: Fold VEC_PERM_EXPR chains implementing concat-and-extract Used configuration : *CI config* tcwg_gnu_cross_check_gcc master-arm *configure and test flags:* --target arm-linux-gnueabihf If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in *.log.1.xz files in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/00-sumfiles/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/notify/ The list of [ignored] baseline and flaky failures are in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts/artifacts.precommit/sumfiles/xfails.xfail Current build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-precommit/107/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2409/artifact/artifacts Warning: we do not enable maintainer-mode nor automatically update generated files, which may lead to failures if the patch modifies the master files. ```
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CI state: success
CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/ : CI bot tcwg_gnu_cross_check_gcc--master-aarch64: Test results
See: https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/notify/mail-body.txt

Dear contributor,

Our automatic CI successfully passed with your patch(es). Please find some details below.

In  master-aarch64, after:
  | gcc patch https://forge.sourceware.org/gcc/gcc-TEST/pulls/108
  | Author: Antoni Boucher <bouanto@zoho.com>
  | Date:   Thu Oct 16 15:24:26 2025 -0400
  | 
  |     [PATCH] libgccjit: Add support for Aarch64 CPU features
  |     
  |     gcc/ChangeLog:
  |     
  |             * config.gcc: Mention new aarch64-jit.o file.
  | ... 19 lines of the commit log omitted.
  | ... applied on top of baseline commit:
  | 2ea9d663650 [RISC-V][PR rtl-optimization/122627] Yet another fix in IRA equivalence array handling


Used configuration :
 *CI config* tcwg_gnu_cross_check_gcc master-aarch64
 *configure and test flags:* --target aarch64-linux-gnu 

If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list.

-----------------8<--------------------------8<--------------------------8<--------------------------

The information below contains the details of the failures, and the ways to reproduce a debug environment:

You can find the failure logs in *.log.1.xz files in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/00-sumfiles/
The full lists of regressions and improvements as well as configure and make commands are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/notify/
The list of [ignored] baseline and flaky failures are in
 * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/sumfiles/xfails.xfail

Current build   : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/2420/artifact/artifacts

Warning: we do not enable maintainer-mode nor automatically update
generated files, which may lead to failures if the patch modifies the
master files.

<!-- linaro-ci-status CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/ --> CI state: success :white_check_mark: CI bot https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/ : CI bot tcwg_gnu_cross_check_gcc--master-aarch64: Test results See: https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/notify/mail-body.txt ``` Dear contributor, Our automatic CI successfully passed with your patch(es). Please find some details below. In master-aarch64, after: | gcc patch https://forge.sourceware.org/gcc/gcc-TEST/pulls/108 | Author: Antoni Boucher <bouanto@zoho.com> | Date: Thu Oct 16 15:24:26 2025 -0400 | | [PATCH] libgccjit: Add support for Aarch64 CPU features | | gcc/ChangeLog: | | * config.gcc: Mention new aarch64-jit.o file. | ... 19 lines of the commit log omitted. | ... applied on top of baseline commit: | 2ea9d663650 [RISC-V][PR rtl-optimization/122627] Yet another fix in IRA equivalence array handling Used configuration : *CI config* tcwg_gnu_cross_check_gcc master-aarch64 *configure and test flags:* --target aarch64-linux-gnu If you have any questions regarding this report, please ask on linaro-toolchain@lists.linaro.org mailing list. -----------------8<--------------------------8<--------------------------8<-------------------------- The information below contains the details of the failures, and the ways to reproduce a debug environment: You can find the failure logs in *.log.1.xz files in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/00-sumfiles/ The full lists of regressions and improvements as well as configure and make commands are in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/notify/ The list of [ignored] baseline and flaky failures are in * https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts/artifacts.precommit/sumfiles/xfails.xfail Current build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-precommit/69/artifact/artifacts Reference build : https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/2420/artifact/artifacts Warning: we do not enable maintainer-mode nor automatically update generated files, which may lead to failures if the patch modifies the master files. ```
pinskia left a comment
Member

I think from an aarch64 point of view this mostly ok; just need the extra checks on the find. I think you need the approvals from jit maintainer still because now it touches the non-aarch64 side of things.
The better splitting is just a suggestion but definitely would help here I think.
Oh I missed some .c_str() in that suggestion but I think you can figure that part out :)

I think from an aarch64 point of view this mostly ok; just need the extra checks on the find. I think you need the approvals from jit maintainer still because now it touches the non-aarch64 side of things. The better splitting is just a suggestion but definitely would help here I think. Oh I missed some `.c_str()` in that suggestion but I think you can figure that part out :)
@ -0,0 +39,4 @@
{
const char *params[] = {"arch"};
#ifndef CROSS_DIRECTORY_STRUCTURE
const char* local_cpu = host_detect_local_cpu (2, params);
Member

I think 2 should be 1 here. Though host_detect_local_cpu only checks to makes sure argc is non-zero and only reads argv[0] but who knows in the future.

I think `2` should be `1` here. Though host_detect_local_cpu only checks to makes sure argc is non-zero and only reads argv[0] but who knows in the future.
@ -0,0 +47,4 @@
const char* arg = "-march=";
size_t arg_pos = arch.find (arg) + strlen (arg);
size_t end_pos = arch.find (" ", arg_pos);
Member

I think these could in theory fail. So the substr below becomes undefines or might exit/throws.
So this needs extra check of std::string::npos needs to be added.

I think these could in theory fail. So the substr below becomes undefines or might exit/throws. So this needs extra check of std::string::npos needs to be added.
@ -0,0 +58,4 @@
EXPLICIT_OFF, FEATURE_STRING) \
if (AARCH64_HAVE_ISA (IDENT)) jit_add_target_info_space ("target_feature", NAME, \
FEATURE_STRING);
#include "aarch64-option-extensions.def"
Member

This is definitely a lot cleaner and then does not need to be updated when extensions are added; That happens at least a few times a year; like what is under review here: https://gcc.gnu.org/pipermail/gcc-patches/2025-November/700630.html. I don't think you want folks to update 2 (or more places).

This is definitely a lot cleaner and then does not need to be updated when extensions are added; That happens at least a few times a year; like what is under review here: https://gcc.gnu.org/pipermail/gcc-patches/2025-November/700630.html. I don't think you want folks to update 2 (or more places).
@ -30,18 +31,42 @@ along with GCC; see the file COPYING3. If not see
#include "tm_p.h"
#include "target.h"
#include "calls.h"
#include <iterator>
Member

I think this should be done early in system.h ...

I think this should be done early in system.h ...
@ -39,0 +47,4 @@
jit_target_add_supported_target_dependent_type (GCC_JIT_TYPE_INT128_T);
}
if (float16_type_node != NULL && TYPE_PRECISION (float16_type_node) == 16)
Member

this will always be 16 precision so I don't think you need that part of the check.

this will always be 16 precision so I don't think you need that part of the check.
@ -62,0 +91,4 @@
void jit_add_target_info_space (const char *key, const char *name,
const char *values)
{
std::istringstream iss (values);
Member

(wish GCC was C++17 to be able to use std::string_view to save one copy of the string)
There must be a better way of doing the split; maybe using find and substr.

Something like this (which has no addition vectors even):

  std::string str = values; // should be string_view to save one extra copy
  size_t pos = 0, prev_pos = 0;
  pos = str.find (' ', pos);
  if (pos == str.npos)
    {
      jit_add_target_info (key, name);
      return;
    }
  while (pos != str.npos)
     {
        jit_add_target_info (key, values.substr(prev_pos, pos - prev_pos));
        prev_pos = pos + 1;
        pos = str.find (' ', pos);
     }
    jit_add_target_info (key, values.substr(prev_pos, pos - prev_pos)); // last word

You could do something similar using strchr instead of std::string :) .

(wish GCC was C++17 to be able to use std::string_view to save one copy of the string) There must be a better way of doing the split; maybe using find and substr. Something like this (which has no addition vectors even): ``` std::string str = values; // should be string_view to save one extra copy size_t pos = 0, prev_pos = 0; pos = str.find (' ', pos); if (pos == str.npos) { jit_add_target_info (key, name); return; } while (pos != str.npos) { jit_add_target_info (key, values.substr(prev_pos, pos - prev_pos)); prev_pos = pos + 1; pos = str.find (' ', pos); } jit_add_target_info (key, values.substr(prev_pos, pos - prev_pos)); // last word ``` You could do something similar using strchr instead of std::string :) .
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